Advanced Computer Micro-architecture Lab – IM216
In this laboratory, master’s students are familiarized with the fundamental principles of computer architectures, performance metrics, heuristic methods, compilation, debugging, and simulation of computer architectures using standardized environments such as the SimpleScalar framework and SPEC benchmarks on the Linux operating system. They develop initial design ideas for a new advanced processing architecture and then prepare for network (LAN) simulation or simulation on the HPC system.
Digital Transformation Lab – IM311
The Digital Transformation Laboratory is a creative space for innovation dedicated to research, development, and experimentation in applying conceptual modeling tools to engineering problems. The applications carried out in the laboratory are structured into three levels: “Business Layer using SAP-Scenes” – an abstraction (level 1) and description of the problem through everyday life scenarios, “Conceptual Modeling Layer” – the conceptual modeling level (level 2) of the problem defined at an abstract level, and “Proof of Concept Layer CPS-Device” – the physical implementation level (level 3) of the prototype described through the previous levels using robots, microcontrollers, and other physical devices (power sources, cables, web cameras, etc.).
Image Processing and Computer Networks Lab – IE006
The laboratory provides 37 state-of-the-art HP computer systems, along with two Cisco bundles (CCNA and Cybersecurity), enabling master’s and doctoral students to carry out educational and research activities on physical computer network architectures.
High-Performance Computing Center (HPC) – IE311
The role of the High-Performance Computing Center is to parallelly execute a series of simulations dedicated to advanced computer microarchitectures as well as other applications such as big data processing and image processing. The developed in-house processing architectures of superscalar, SMT (simultaneous multithreading), and CMP (multicores) types based on value prediction and dynamic instruction reuse will be evaluated by conducting automated design space explorations using our developed tool (FADSE). The analysis will involve understanding the concept of a domain ontology (for real-time multicore systems) and how it can be formally represented. Furthermore, the exploration will aim to understand how such a domain ontology can improve the efficiency of multi-objective optimization algorithm simulations.